1. Field of the Invention
The present invention relates to a method for manufacturing a silicon carbide semiconductor device, and more particularly relates to a method for manufacturing a silicon carbide Schottky barrier diode.
2. Description of the Background Art
In manufacture of a silicon carbide Schottky barrier diode (hereinafter, described as SiC-SBD), what are important are selection of a Schottky metal material and stabilization of forward characteristics thereof. Common examples of the Schottky metal material include Ti, Ni, Mo, W, and the like. In a case of manufacturing a Ti Schottky diode provided on a rear surface thereof with an Ni ohmic junction, there arise the following process features and problems.
In a kV class high withstand voltage SiC Schottky diode, a p-type termination structure is essentially required for relaxation of a peak of an electric field (electric field concentration), since electric field concentration is normally caused in the vicinity of an outer edge of a Schottky electrode. In general, such a termination structure is formed by implanting ions of p-type impurities such as Al (aluminium) and B (boron) into an n-type epitaxial layer and performing activation annealing at a high temperature of at least around 1500° C.
In order to form a Ti Schottky junction of excellent characteristics, the Schottky junction is desirably formed on a front surface in an early stage of a wafer process. However, the Ni ohmic junction to be formed on the rear surface should be formed by annealing at a high temperature of approximately 1000° C., while the Ti Schottky junction is not strong enough to be kept in an appropriate state at such a high temperature. Therefore, it is presently general to form the Ni ohmic junction on the rear surface and then form the Ti Schottky junction on the front surface.
Japanese Patent Laid-Open No. 3890311 discloses a method for manufacturing a semiconductor device by forming at one time a Schottky junction on a front surface and an ohmic junction on a rear surface. Techniques relevant to the present invention are also disclosed in Japanese Patent Laid-Open No. 3884070, Japanese Patent Application Laid-Open No. 2004-172400, and Japanese Patent Application Laid-Open No. 2000-164528.
In manufacture and evaluation of an SiC-SBD, characteristics of a backward leakage current and a backward withstand voltage out of device characteristics thereof are greatly influenced by a defect in a wafer or a epitaxial layer as well as a defect in process. Forward characteristics, particularly barrier heights φB and an n-value, are greatly influenced by preprocessing conditions in forming a Schottky junction, conditions in forming a Schottky metal film, a method for patterning the Schottky metal, and conditions in burning and heating after application of a sealant such as polyimide. The Ti Schottky diode has also been required to be manufactured such that the above-described processes do not influence the forward characteristics. However, an SiC-SBD manufactured in accordance with a conventional method has a problem that forward characteristics thereof are not stabilized, and in particular, barrier heights φB are varied in a range of approximately 1.05 to 1.25 eV.
The manufacturing method described in Japanese Patent Laid-Open No. 3890311 would be ideal if metals of a same type are used as a Schottky material for a front surface and an ohmic material for a rear surface and excellent junctions are obtained by annealing at one time. However, this method remarkably narrows process margins in practice, and therefore, is not suitable for a mass production process in view of objects such as increasing a rate of excellent qualities in an entire wafer and manufacturing devices stably and reproducibly.